The present invention relates to an input/output protection circuit for protecting an internal element.
A conventional input/output protection circuit will be described with reference to FIGS. 1A and 1B. FIG. 1A is a fragmentary plane view illustrative of the conventional input/output protection circuit FIG. 1B is a fragmentary cross sectional elevation view taken along an line IB--IB of FIG. 1A. The conventional input/output protection circuit is formed on a p-type semiconductor substrate 501. The conventional input/output protection circuit has a p-channel MOS off-buffer diode region 530 and an n-channel MOS off-buffer diode region 540. An n-well region 535 is selectively formed in an upper region of the p-channel MOS off-buffer diode region 530 in the p-type semiconductor substrate 501. Field oxide films 505 are selectively formed on a surface of the p-type semiconductor substrate 501 so that the field oxide films 505 define first and second active regions in the p-channel MOS off-buffer diode region 530 and the n-channel MOS off-buffer diode region 540 respectively. A p-channel MOS off-buffer diode is formed in the first active region in the p-channel MOS off-buffer diode region 530. An n-channel MOS off-buffer diode is formed in the second active region in the n-channel MOS off-buffer diode region 540. An inter-layer insulator 506 is formed which extends over the field oxide films 505 and the p-channel and n-channel MOS off-buffer diodes in the first and second active regions. An input/output pad 502 is selectively formed on the inter-layer insulator 506 in a region spaced from the p-channel and n-channel MOS off-buffer diode region 530 and 540. A high voltage power interconnection 503 is formed in the p-channel MOS off-buffer diode region 530. A low voltage power interconnection 504 is formed in the n-channel MOS off-buffer diode region 540. The p-channel MOS off-buffer diode has a looped gate electrode 531 which is connected to the high voltage power interconnection 503. The p-channel MOS off-buffer diode also has a p-type drain region 532 with a high impurity concentration which is connected to the input/output pad 502 and also connected to the looped gate electrode 531. The p-channel MOS off-buffer diode also has a p-type source region 533 with a high impurity concentration which extends around the p-type drain region 532 and which is connected to the high voltage power interconnection 503 and also connected to the looped gate electrode 531. The p-channel MOS off-buffer diode also has an n-type back gate 534 with a high impurity concentration which extends around the p-type source region 533 and which is connected to the p-type source region 533 and the field oxide film 505. The n-channel MOS off-buffer diode has a looped gate electrode 541 which is connected to the low voltage power interconnection 504. The p-channel MOS off-buffer diode also has an n-type drain region 542 with a high impurity concentration which is connected to the input/output pad 502 and also connected to the looped gate electrode 541. The p-channel MOS off-buffer diode also has an n-type source region 543 with a high impurity concentration which extends around the n-type drain region 542 and which is connected to the low voltage power interconnection 504 and also connected to the looped gate electrode 541. The p-channel MOS off-buffer diode also has a p-type back gate 544 with a high impurity concentration which extends around the n-type source region 543 and which is connected to the n-type source region 543 and the field oxide film 505. The above prior art is disclosed in Japanese laid-open patent publication No. 63-202056.
The p-type drain region 532 is surrounded by the p-type source region 533 and the n-type back gate 534 in order to separate or distance the p-type drain region 532 from the outside portion whereby an electrostatic pulse and the like are absorbed in the p-channel MOS off-buffer diode. Also the n-type drain region 542 is surrounded by the n-type source region 543 and the p-type back gate 544 in order to separate or distance the n-type drain region 542 from the outside portion whereby an electrostatic pulse and the like are absorbed in the n-channel MOS off-buffer diode.
In recent years, the number of input/output terminals has been on the increase. In this case, it might have been required to narrow a pitch of the input/output terminals, wherein a protection circuit is connected to each of the input/output terminals. The provisions of the protection circuits for the individual input/output terminals result in the increase in chip area, for which reason it is required to scale down or shrink the individual protection circuits.
In order to reduce the occupied area of the individual protection circuit, it is required to reduce a distance between the p-channel and n-channel MOS diodes used as the protection circuits.
FIG. 2 is a circuit diagram illustrative of an equivalent circuit of the input/output protection circuit of FIGS. 1A and 1B. An input terminal 602 is connected to an internal element 606. The equivalent circuit has a series connection of the p-channel and n-channel MOS off-buffer diodes 630 and 640 between the high voltage power terminal 603 and the low voltage power terminal 604 which is grounded. The p-channel MOS off-buffer diode 630 is connected to the high voltage power terminal 603. The n-channel MOS off-buffer diode 640 is connected to the low voltage power terminal 604. The input terminal is connected between the p-channel and n-channel MOS off-buffer diodes 630 and 640. The p-channel MOS off-buffer diode 630 has a parasitic n-well resistance 635. The n-channel MOS off-buffer diode 640 has a parasitic p-well resistance 645. The internal element is connected to the high voltage power terminal 603 and also connected to the ground line. A parasitic thyristor 607 is further formed between the p-channel and n-channel MOS off-buffer diodes 630 and 640. Since the parasitic thyristor 607 is formed, it is required for suppression of the operation of the parasitic thyristor 607 to ensure a sufficient distance between the p-channel and n-channel MOS off-buffer diodes.
In contrast, however, in order to increase the density of integration of the circuits, it is required to narrow the distance between the p-channel and n-channel MOS off-buffer diodes. Narrowing the distance between the p-channel and n-channel MOS off-buffer diodes, however, results in a certain possibility of operation of the parasitic thyristor due to a trigger of external noise whereby a problem with a latch-up generation is raised.
In the above circumstances, it had been required to develop a novel input/output protection circuit free from the above problems as described above.